Pipeline 0 -- basic_switch
Stages Occupied: 12
Resource Usage Summary
Stage Number |
Exact Match Input xbar |
Ternary Match Input xbar |
Hash Bit |
Hash Dist Unit |
Gateway |
SRAM |
Map RAM |
TCAM |
VLIW Instr |
Meter ALU |
Stats ALU |
Stash |
Exact Match Search Bus |
Exact Match Result Bus |
Tind Result Bus |
Action Data Bus Bytes |
8-bit Action Slots |
16-bit Action Slots |
32-bit Action Slots |
Logical TableID |
0 |
28 |
36 |
174 |
3 |
8 |
21 |
0 |
13 |
15 |
0 |
0 |
6 |
8 |
6 |
6 |
70 |
26 |
22 |
18 |
15 |
1 |
65 |
12 |
183 |
2 |
6 |
40 |
2 |
4 |
6 |
1 |
0 |
7 |
8 |
8 |
3 |
66 |
6 |
18 |
18 |
9 |
2 |
15 |
8 |
80 |
0 |
4 |
15 |
3 |
2 |
12 |
1 |
0 |
5 |
5 |
5 |
2 |
42 |
6 |
14 |
11 |
8 |
3 |
35 |
47 |
129 |
0 |
9 |
21 |
2 |
14 |
29 |
0 |
0 |
5 |
7 |
5 |
4 |
67 |
19 |
16 |
19 |
12 |
4 |
88 |
56 |
263 |
0 |
12 |
45 |
0 |
14 |
11 |
0 |
0 |
12 |
13 |
12 |
3 |
80 |
16 |
32 |
20 |
16 |
5 |
58 |
44 |
154 |
0 |
2 |
46 |
12 |
10 |
13 |
0 |
4 |
9 |
9 |
9 |
3 |
80 |
16 |
32 |
20 |
8 |
6 |
90 |
54 |
159 |
3 |
9 |
12 |
0 |
14 |
9 |
0 |
0 |
5 |
7 |
5 |
3 |
24 |
0 |
12 |
6 |
10 |
7 |
23 |
8 |
126 |
4 |
6 |
23 |
11 |
4 |
10 |
1 |
4 |
3 |
4 |
6 |
3 |
22 |
10 |
6 |
6 |
10 |
8 |
6 |
17 |
68 |
0 |
1 |
11 |
0 |
4 |
16 |
0 |
0 |
2 |
2 |
2 |
2 |
42 |
6 |
10 |
11 |
4 |
9 |
20 |
7 |
183 |
2 |
5 |
27 |
4 |
3 |
9 |
2 |
0 |
6 |
6 |
8 |
2 |
104 |
24 |
32 |
27 |
10 |
10 |
20 |
13 |
107 |
1 |
6 |
15 |
4 |
3 |
6 |
1 |
1 |
3 |
4 |
4 |
2 |
20 |
8 |
6 |
5 |
7 |
11 |
3 |
40 |
12 |
1 |
2 |
8 |
7 |
8 |
5 |
1 |
2 |
0 |
1 |
1 |
1 |
18 |
6 |
2 |
5 |
2 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Totals |
451 |
342 |
1638 |
16 |
70 |
284 |
45 |
93 |
141 |
7 |
11 |
63 |
74 |
71 |
34 |
635 |
143 |
202 |
166 |
111 |
Resource Percentage Summary
Stage Number |
Exact Match Input xbar |
Ternary Match Input xbar |
Hash Bit |
Hash Dist Unit |
Gateway |
SRAM |
Map RAM |
TCAM |
VLIW Instr |
Meter ALU |
Stats ALU |
Stash |
Exact Match Search Bus |
Exact Match Result Bus |
Tind Result Bus |
Action Data Bus Bytes |
8-bit Action Slots |
16-bit Action Slots |
32-bit Action Slots |
Logical TableID |
0 |
21.88% |
54.55% |
41.83% |
50.00% |
50.00% |
26.25% |
0.00% |
54.17% |
46.88% |
0.00% |
0.00% |
37.50% |
50.00% |
37.50% |
37.50% |
54.69% |
81.25% |
68.75% |
56.25% |
93.75% |
1 |
50.78% |
18.18% |
43.99% |
33.33% |
37.50% |
50.00% |
4.17% |
16.67% |
18.75% |
25.00% |
0.00% |
43.75% |
50.00% |
50.00% |
18.75% |
51.56% |
18.75% |
56.25% |
56.25% |
56.25% |
2 |
11.72% |
12.12% |
19.23% |
0.00% |
25.00% |
18.75% |
6.25% |
8.33% |
37.50% |
25.00% |
0.00% |
31.25% |
31.25% |
31.25% |
12.50% |
32.81% |
18.75% |
43.75% |
34.38% |
50.00% |
3 |
27.34% |
71.21% |
31.01% |
0.00% |
56.25% |
26.25% |
4.17% |
58.33% |
90.62% |
0.00% |
0.00% |
31.25% |
43.75% |
31.25% |
25.00% |
52.34% |
59.38% |
50.00% |
59.38% |
75.00% |
4 |
68.75% |
84.85% |
63.22% |
0.00% |
75.00% |
56.25% |
0.00% |
58.33% |
34.38% |
0.00% |
0.00% |
75.00% |
81.25% |
75.00% |
18.75% |
62.50% |
50.00% |
100.00% |
62.50% |
100.00% |
5 |
45.31% |
66.67% |
37.02% |
0.00% |
12.50% |
57.50% |
25.00% |
41.67% |
40.62% |
0.00% |
100.00% |
56.25% |
56.25% |
56.25% |
18.75% |
62.50% |
50.00% |
100.00% |
62.50% |
50.00% |
6 |
70.31% |
81.82% |
38.22% |
50.00% |
56.25% |
15.00% |
0.00% |
58.33% |
28.12% |
0.00% |
0.00% |
31.25% |
43.75% |
31.25% |
18.75% |
18.75% |
0.00% |
37.50% |
18.75% |
62.50% |
7 |
17.97% |
12.12% |
30.29% |
66.67% |
37.50% |
28.75% |
22.92% |
16.67% |
31.25% |
25.00% |
100.00% |
18.75% |
25.00% |
37.50% |
18.75% |
17.19% |
31.25% |
18.75% |
18.75% |
62.50% |
8 |
4.69% |
25.76% |
16.35% |
0.00% |
6.25% |
13.75% |
0.00% |
16.67% |
50.00% |
0.00% |
0.00% |
12.50% |
12.50% |
12.50% |
12.50% |
32.81% |
18.75% |
31.25% |
34.38% |
25.00% |
9 |
15.62% |
10.61% |
43.99% |
33.33% |
31.25% |
33.75% |
8.33% |
12.50% |
28.12% |
50.00% |
0.00% |
37.50% |
37.50% |
50.00% |
12.50% |
81.25% |
75.00% |
100.00% |
84.38% |
62.50% |
10 |
15.62% |
19.70% |
25.72% |
16.67% |
37.50% |
18.75% |
8.33% |
12.50% |
18.75% |
25.00% |
25.00% |
18.75% |
25.00% |
25.00% |
12.50% |
15.62% |
25.00% |
18.75% |
15.62% |
43.75% |
11 |
2.34% |
60.61% |
2.88% |
16.67% |
12.50% |
10.00% |
14.58% |
33.33% |
15.62% |
25.00% |
50.00% |
0.00% |
6.25% |
6.25% |
6.25% |
14.06% |
18.75% |
6.25% |
15.62% |
12.50% |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Average |
29.36% |
43.18% |
32.81% |
22.22% |
36.46% |
29.58% |
7.81% |
32.29% |
36.72% |
14.58% |
22.92% |
32.81% |
38.54% |
36.98% |
17.71% |
41.34% |
37.24% |
52.60% |
43.23% |
57.81% |
Phase 0 is used for table ingress_port_mapping.
MAU Stage 0
MAU Stage 1
MAU Stage 2
MAU Stage 3
MAU Stage 4
MAU Stage 5
MAU Stage 6
MAU Stage 7
MAU Stage 8
MAU Stage 9
MAU Stage 10
MAU Stage 11
Created on Tue Aug 10 08:45:26 2021
Compiler version: 5.16.0 (a35e94c)
Run ID: 01ea792ddf4761b0